Bounty Description
Industry: Aerospace / Aviation / Defense
Job Category: Engineering - Electrical
Job Details

Job Schedule: 4/10 - Employees work 10 hour days, 4 days per week.

 

Job Description:

As a Hardware Engineer at our company, you will be responsible for architecture, design and development of next generation Electronic Safe and Arm Devices utilizing the latest state of the art technologies. The ideal candidate for this role would share our passion for creating and innovating new technologies in a highly dynamic, fast-paced environment. We are looking for highly talented, motivated, and versatile engineers that can create the next generation fuzing solutions. ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A interfaces, communication protocols, state machines, timer chains, etc. used in Electronic Safe and Arm Devices (Fuzes) for DOD weapon systems.  Microsemi / Actel is our targeted FPGA and QuestaSim is our simulation tool.  The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and C# based microcontroller development.

 

Essential Functions:

Analysis of the requirements, architecture definition, design and debug of FPGA and associated hardware and microcontroller products and associated firmware.
Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA’s.
Performing effective analysis of functional issues or performance profiling with the hardware and firmware in test environments or target host systems.
Contribute to process improvements to ensure hardware-firmware quality and time-to-market.
 

Qualifications:

Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.
Knowledge using Verilog for Logic Design.
Programming experience in C for embedded systems, including development of algorithms, manipulation of data structures, and implementing highly optimized code.
Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers.
Familiar with hardware, software and firmware development methodologies to ensure quality and time-to-market (design verification, code reviews, unit testing, prototyping and product testing).
Familiar working with code version control repository tools, such as Subversion (SVN), GIT or TFS.
Digital Design practices and principles, logic design and architecture and experience with HDL’s (i.e Verilog, VHDL).
 

Preferred Additional Skills:

Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus.
Developing C# source code targeting enhanced Flash Microcontrollers.
Good English knowledge (speech and writing).
Be action-oriented and organized.
Ability to handle short notice needs/requests.
In compliance with pay transparency requirements, the salary range for this role in California, Massachusetts, New Jersey, Washington, and the Greater D.C, Denver, or NYC areas is $106,500 - $197,500. The salary range for this role in Colorado state, Hawaii, Illinois, Maryland, Minnesota, New York state, Cleveland Ohio, and Vermont is $92,500 - $171,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.
Security Clearance Required: No
Visa Candidate Considered: No
Compensation
Base Salary - USD $142,000 to $161,000
*** Never repost ***
Full-time
Benefits - Full
Relocation Assistance Available - Possible for ideal candidate
Commission Compensation - No
Bonus Eligible - No
Overtime Eligible - No
Interview Travel Reimbursed - No
Candidate Details
Seniority Level - Mid-Senior
Management Experience Required - No
Minimum Education - Bachelor's Degree
Willingness to Travel - Occasionally